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Cramming More Components onto Integrated Circuits
prediction · Gordon E. Moore · 1965 — the claim; revised downward by Moore himself in 1975
A dated claim, carried graded: the claim in its own words, when it was made, when it came due, and what actually happened. Where a predictor graded themselves, their grade and an independent one, saying they differ. The point of the kind is a base rate for how wrong AI forecasting runs.
Read on: The Kurzweil record, 1990–2024 — thirty-five years of dated claims, and the people who counted them.
prediction is the right kind and proposals.md filed it correctly. The citation occasion filed with it — "substrate extrapolation — the base rate's one clean success" — is right about the first half and needs a qualification on the second, and supplying that qualification is most of what this entry is for.
Three things are true at once and they are usually reported one at a time:
One. The prediction as literally made — a doubling every year for ten years, to 65,000 components per chip by 1975 — is the most accurate long-horizon technology forecast this canon holds. Nothing in the prediction kind comes close.
Two. The forecaster cut his own rate in half at the due date, in public, with the arithmetic shown, and went on deflating it for the next forty years. The version that "held for fifty years" is the 1975 revision, not the 1965 claim, and the man who says so most plainly is Moore.
Three, and this is the one that matters for a base rate. In 1992 Moore personally convened the working session at which the industry turned his observation into a fifteen-year plan. From that point the semiconductor industry was not being described by Moore's law; it was hitting a number that six national industry associations had agreed to hit. A forecast that becomes a production target stops being evidence about forecasting. It is the one clean success in the kind, and it is contaminated as a data point, and both halves have to travel together or the entry does more harm than good.
1. What it is
The artefact
**Gordon E. Moore, "Cramming More Components onto Integrated Circuits," Electronics, volume 38, number 8, 19 April 1965, pp. 114–117.** Four pages in a trade magazine, one of a set of pieces the editors commissioned from industry figures under the banner The Experts Look Ahead for the magazine's thirty-fifth anniversary. Moore was thirty-six and Director of the Research and Development Laboratories at Fairchild Semiconductor; he would co-found Intel three years later. The contributor's note printed with it is worth keeping, because it says what he was: "one of the new breed of electronic engineers, schooled in the physical sciences rather than in electronics… a B.S. degree in chemistry from the University of California and a Ph.D. degree in physical chemistry from the California Institute of Technology."
The magazine's own summary, set in italic above the first column, states the claim before the article does:
> "With unit cost falling as the number of components per circuit rises, by > 1975 economics may dictate squeezing as many as 65 000 components on a single > silicon chip."
Note economics may dictate, and note that the standfirst is an editor's summary and is more careful than most of what has been written about the piece since.
The claim, in his own words
Section IV, "Costs and Curves," second-to-last paragraph:
> "The complexity for minimum component costs has increased at a rate of > roughly a factor of two per year (see graph). Certainly over the short term > this rate can be expected to continue, if not to increase. Over the longer > term, the rate of increase is a bit more uncertain, although there is no reason > to believe it will not remain nearly constant for at least ten years. That > means by 1975, the number of components per integrated circuit for minimum cost > will be 65 000." > > "I believe that such a large circuit can be built on a single wafer."
Four features of that paragraph get lost in every retelling and all four change what is being claimed.
It is a claim about cost, not about physics. The quantity is the complexity at which cost per component is minimised — the bottom of a U-shaped curve, not the top of what can be built. Moore sets the curve out in the paragraph before: for simple circuits, cost per component falls with the count, because you are buying less silicon per function; then falling yields on bigger dies push it back up. "Thus there is a minimum cost at any given time in the evolution of the technology. At present, it is reached when 50 components are used per circuit. But the minimum is rising rapidly while the entire cost curve is falling." His Fig. 1 draws that curve three times, for 1962, 1965 and 1970, each lower and each with its minimum further right. The whole claim is that the bottom of that curve moves right at a fixed rate. Strip out the cost clause and you have a different and weaker proposition.
It is hedged, twice, in the two sentences that matter. "Certainly over the short term" against "the rate of increase is a bit more uncertain" over the longer term. It is the sentence of a man extrapolating and saying so.
It has a fixed horizon: ten years, expiring in 1975. Not "indefinitely," not "for the foreseeable future." He named the year and the number.
And it rests on five data points. Fig. 3 plots log₂ of components per integrated function against year, from 1 in 1959 to a projected 65,536 in 1975, with real points only up to 1965 — the Computer History Museum counts "five points representing the number of components per integrated circuit for minimum cost per component developed between 1959 and 1964," and Moore's own recollection is that he had "points up to the 50-60 component circuit plotted for 1965," starting from Fairchild's early Micrologic parts. Five points and a straight line through them on semi-log paper. His own description, fifty years later: "I just did a wild extrapolation saying it's going to continue to double every year for the next 10 years."
The rest of the paper, which is not about the curve
Most of the article is a sales pitch for integrated circuits, and reading it whole changes the impression the famous paragraph leaves. Moore's second and third paragraphs are a list of applications:
> "Integrated circuits will lead to such wonders as home computers—or at least > terminals connected to a central computer—automatic controls for automobiles, > and personal portable communications equipment. The electronic wristwatch needs > only a display to be feasible today."
Section V works out that 65,000 two-mil components "need occupy only about one-fourth a square inch" at 500 components per linear inch. Section VI asserts that "there is no fundamental obstacle to achieving device yields of 100%." Section VII, headed "Heat Problem," asks whether tens of thousands of components on one chip can be cooled and answers that they can, for reasons §5.3 grades. Section VIII worries about design cost and suggests "newly devised design automation procedures." And Fig. 2 is a cartoon: a department-store aisle with counters marked NOTIONS and COSMETICS, and between them a salesman under a sign reading HANDY HOME COMPUTERS.
What kind of document this is, therefore, is an advocacy piece by a man selling the thing it is about. Moore's own account of the purpose: "I was just trying to get across the idea this was a technology that had a future and that it could be expected to contribute quite a bit in the long run." That does not make it wrong. It makes it a different sort of object from a research result, and the canon should file it accurately: the most successful technology forecast on record was published as marketing.
One artefactual note, because it says something about how the piece became famous. In April 2005 Intel offered $10,000 on eBay for an original copy of the 19 April 1965 Electronics; university librarians reported a rush to secure their bound volumes against theft, and the bounty was collected by a British engineer who found a near-mint copy under his floorboards. A company had to place a bounty to obtain a physical copy of its own founding document, forty years on. This entry did not read the magazine either; it read the January 1998 Proceedings of the IEEE reprint, as page images (§7).
2. On the kind, the year field, and descends_from
prediction is correct. build.py states the kind's purpose as "a dated claim, carried graded: the claim in its own words, when it was made, when it came due, and what actually happened," for the sake of "a base rate for how wrong AI forecasting runs." All four elements are here and unusually clean: a printed sentence, a fixed date, an explicit ten-year horizon, and an outcome that can be checked against devices that were on sale.
idea was the real temptation, and the tension is this entry's subject. What people mean by "Moore's law" in 2026 is not a 1965 forecast about 1975; it is a framing — an expectation that the substrate improves on a schedule — and framings that later work is built out of rather than argued about are exactly what idea is for. There is also a genuine reusable method in the 1975 paper (§3), which would sit comfortably in idea on the test human-computers and nordhaus-price-of-light-1994 applied to that kind. The entry stays in prediction because that is where the grading discipline is, and because a file that quietly promoted this claim to an idea would lose the one thing the canon most needs from it: an honest accounting of what a very good forecast looks like, what it cost to keep true, and why it should not be used as a licence for the next one.
The year field carries a qualifier, as simon-1965 does and for the same reason: a bare 1965 hides the fact that the surviving version of the claim is Moore's own 1975 revision, and the metadata is where nobody sees that argued. The site's four-digit extraction still reads 1965 and the entry sorts where its id says it should.
descends_from is empty, and not for lack of ancestors. The real ones are the planar process and the integrated circuit — Kilby at TI in 1958, Noyce and Hoerni at Fairchild in 1959, whose first planar transistor is literally the 1959 data point at the left edge of Moore's chart. None of them is in canon/, and this is the largest gap this file ran into: the canon has entries for the machines (ibm-pc-1981, macintosh-1984, apple-iie-1983, mobile-phone-1973) and nothing for the device they are all made of. Inventing an id would be worse than an empty field.
Entries already in canon/ that are siblings or descendants, named here so a later revision can draw the arrows from the other end: kurzweil-2005, which records that this is the ancestor it most wants, because The Singularity Is Near's Chapter Two is an argument that Moore's law is one paradigm among five; bitter-lesson-2019, whose entire mechanism is "Moore's law, or rather its generalization of continued exponentially falling cost per unit of computation"; scaling-laws-2020, which is the modern claim of the same epistemic type and says so; superintelligence-2014, whose recalcitrance argument is drawn from this curve and is attacked on exactly that ground (§5.5); human-genome-project-2003, where NHGRI's own graphs are drawn against this curve as the yardstick; spacex-booster-reuse and tesla-volume-production, both of which record wanting this file for the cost-curve argument and having to make it themselves; and google-index-1998, which names the failure mode this entry is supposed to carry — "a capability forecast that is right about the resource curve and wrong about the task."
3. The 1975 revision, which is the part worth stealing
Ten years later, at the International Electron Devices Meeting in December 1975, Moore came back to grade himself. The paper is "Progress in Digital Integrated Electronics," IEDM Technical Digest 1975, pp. 11–13, and it is three pages long. It opens:
> "Complexity of integrated circuits has approximately doubled every year since > their introduction. Cost per function has decreased several thousand-fold, > while system performance and reliability have been improved dramatically."
Then he does the thing nobody remembers him for, and it is better than the forecast. He takes the exponential apart to see what it is made of, on the explicit reasoning that "the expected trends can then be recombined to see how long exponential growth in complexity can be expected to continue." Three contributors, each measured separately over 1959–1975:
| contributor | what it is | factor, 1959–1975 | |---|---|---| | die area | bigger chips | ≈ 20× | | dimension reduction | finer lines — 1 mil in 1961 to 5 µm in 1975 | ≈ 32× | | device and circuit cleverness | packing more function into the same area | ≈ 100× |
Twenty times thirty-two is 640; the total is about 65,000; so the residual — the part that came from neither bigger chips nor smaller features — is the largest single contributor, and Moore says so: "It is noteworthy that this contribution to complexity has been more important than either increased chip area or finer lines."
And then the forecast, which is a forecast about which contributor runs out first:
> "With respect to the factor contributed by device and circuit cleverness, > however, the situation is different. Here we are approaching a limit that must > slow the rate of progress… I am inclined to suggest a limit to the contribution > of circuit and device cleverness of another factor of four in component > density." > > "With this factor disappearing as an important contributor, the rate of > increase of complexity can be expected to change slope in the next few years… > The new slope might approximate a doubling every two years, rather than every > year, by the end of the decade."
He also left a second dated claim in the last line: "Even at this reduced slope, integrated structures containing several million components can be expected within ten years" — due 1985, graded in §5.1.
Two things about this paper deserve to outlive it. The first is the method: decompose the exponential into its contributors, measure each, and ask which one is nearest its limit. That is the most transferable thing in this entry and §4.2 is about applying it. The second is the honesty of the timing — the revision is published at the due date of the original claim, by the author, cutting his own rate in half.
One detail in it should be held against him, though, and it is not usually noticed. The data point Moore plots for 1975 — the device that certifies his own forecast on schedule — is "the 16,384-bit charge-coupled device memory chip." CCD memory was a technology Fairchild and Intel were then pushing hard, and it lost: the Computer History Museum's account of the era files it with magnetic bubble memory among "numerous ingenious information storage technologies that were announced with great fanfare but were ultimately unsuccessful in the marketplace." The industry's memory turned out to be DRAM, which in 1975 was shipping at 4 kilobits; the 16K DRAM (Mostek's MK4116) arrived in 1976. The 1975 verification point was the forecaster's own company's technology, counted by the forecaster's own convention, on a product line that was abandoned. That does not make the trend false — §5.1 grades the trend, not the checkpoint — but it is exactly the kind of thing a self-grade produces and an independent grade does not.
4. Why a reading would cite it
4.1 It is the yardstick, and this project already uses it three times
The concrete case is not that a reading will discuss semiconductors. It is that Moore's law is the unit every other technology cost curve is quoted in, and three entries already in canon/ do it:
human-genome-project-2003records that NHGRI's own cost-of-sequencing graphs are drawn against this curve and that the January 2008 switch to next-generation sequencing shows as "the sudden and profound out-pacing of Moore's Law."bitter-lesson-2019carries Epoch AI and MIT FutureTech's finding that the compute needed to reach a fixed language-model performance threshold halves roughly every eight months — "substantially faster than Moore's law" — where Moore's law is the baseline that makes "substantially faster" mean anything.mobile-phone-1973carries "Cooper's Law" as "a Moore's-law-shaped claim" and grades it against this one's shape.
A reading that meets "faster than Moore's law" needs to know which Moore's law, over what period, and measuring what — because the phrase is used for at least five different quantities with five different histories (§6). This file is where that gets settled once instead of every twelve hours.
4.2 The decomposition, applied to the number this project watches most
The 1975 method is the citation that earns its keep. Take the exponential everyone is quoting, break it into contributors, measure each, and see which one is doing the work.
For frontier AI training compute in 2026, the decomposition is available and it is not flattering to the substrate story. Epoch AI, measuring 2010 to May 2024 across 333 models, put training-compute growth at 4.1× per year for notable models and 5.3× for frontier models (Sevilla and Roldán, 28 May 2024). The hardware contribution to that is far smaller: kurzweil-2005 records Epoch's measurement of FLOP/s per dollar doubling about every 2.3–2.5 years across GPUs and AI accelerators — call it 1.3–1.4× a year, which is Moore's revised slope and no better.
My arithmetic, stated as mine: if the substrate contributes about 1.35× a year and the observed growth is about 4.5× a year, the substrate accounts for roughly a fifth of the exponent and the remaining four-fifths is more chips, run longer — that is, money. Epoch's own framing agrees in direction: most of the growth comes from increased spending, with hardware improvement a contributor rather than the driver.
This is precisely the error class spacex-booster-reuse had to argue without this file: "anyone using the chart to size a reuse effect is crediting reuse with a curve that manufacturing produced." Here the move is crediting Moore's law with a curve that capital expenditure produced. A reading that meets "compute is on an exponential, and exponentials in compute are what Moore's law is" should reach for this entry and ask which contributor is which, because the two have completely different failure modes: a substrate curve fails slowly, against physics, and a spending curve fails suddenly, against a balance sheet. The project's own ledger this month is full of the second kind — roughly $3tn of off-balance-sheet commitments read out of nine companies' filing footnotes on 17 August 2026, a 20-year lease on a 10GW campus, and Dell'Oro doubling its 2030 datacentre capex outlook to above $3tn in seven months.
4.3 The live occasions, in the project's own recent record
Four items from readings in the eight days before this file was written each touch a specific sentence of the 1965 paper. They are named as citation occasions, not as evidence, and nothing is taken from them.
The minimum-cost clause, going backwards. The 19 August 2026 midday reading recorded Samsung raising foundry prices "by up to 15%" on new orders — 10–15% on 4nm, 5–10% in Taiwan, 10–15% on 5nm, and close to 10% on the 8nm node, an old process — as leading-edge capacity filled. Moore's claim was never "chips get more complex"; it was "the complexity for minimum component costs." A price rise on a seven-year-old node is not a scaling story, it is a scarcity story — but it lands on exactly the clause the forecast depends on, and §5.4 sets out what is and is not established about the cost curve.
"I believe that such a large circuit can be built on a single wafer." On 18–19 August 2026 Cerebras announced the CS-4, a rack built from three wafer-scale engines. The WSE-3 is a single 46,225 mm² TSMC 5nm wafer carrying about four trillion transistors — my arithmetic: about 61 million times Moore's 65,000, on the single wafer he said it could be done on. And the way Cerebras got more out of it this year is the detail that matters: the WSE-3 Turbo doubles the clock from 1.4 to 2.8 GHz, and, per The Next Platform, requires "twice as much power pumped through it" and "a little more than twice as much cooling." Sixty-one years after Moore's Section VII said the heat would not be a problem, the flagship wafer-scale machine buys its speed at one-for-one in watts. §5.3 grades that sentence.
"Device and circuit cleverness," priced. The same day's reading recorded Fractile in advanced talks at a $6.5bn pre-money valuation on the strength of a $250m Anthropic order, for an architecture that "places compute and memory on the same die in SRAM rather than fetching from off-chip DRAM." That is Moore's third contributor — not a smaller transistor, not a bigger die, but a cleverer arrangement of the same silicon — and in 2026 it is what the money is chasing, with the chips not shipping until 2027. Moore's 1975 forecast was that this contributor would run out within a factor of four. §5.6 grades that.
4.4 Where this entry does not reach, and it is important
It is not evidence that anything will keep improving. The most common use of Moore's law in AI argument is as a warrant for an unrelated extrapolation, and this entry's own record is the reason that fails: the curve held for decades because a specific industry, with a specific physical process, organised itself around a published target and paid eighteen times more researchers to hit it (§5.5). None of those three conditions transfers by analogy. scaling-laws-2020 already makes the point from the other end — that "law" is doing unearned work in its own name, and that the epistemic type is the same as this one's.
And it is not a reason to disbelieve a cost-curve claim either. Symmetry matters here. The lesson of this file is not "exponentials always break" any more than it is "exponentials always continue." It is that an exponential is a composite, and that the useful question is always the 1975 question: what is it made of, and which part is nearest its limit?
5. What it got right, and what it got wrong
5.1 The claim, the dates, the outcome
The claim, in its own words: "The complexity for minimum component costs has increased at a rate of roughly a factor of two per year… there is no reason to believe it will not remain nearly constant for at least ten years. That means by 1975, the number of components per integrated circuit for minimum cost will be 65 000."
Date made: 19 April 1965, Electronics 38(8), pp. 114–117.
Date due: 1975. Explicit, arithmetic, and named in the sentence.
What happened by 1975 — and the honest answer needs two grades.
On Moore's own accounting: met. His December 1975 IEDM paper plots the 1975 point on the line and attributes it to a 16,384-bit CCD memory chip, and the decomposition in §3 exists to explain how the 65,000-fold increase was achieved. Every retelling since, including the Computer History Museum's, records the projection as realised.
On an independent accounting: approximately right on the trend and wrong on the rate, with the checkpoint carried by a hand-picked device. In 1975 the mainstream parts were the 4-kilobit DRAM and the Intel 8080 microprocessor at several thousand transistors; the 16K DRAM was a 1976 product. The minimum-cost-per-component chip of 1975 — which is the quantity the claim is about — was an order of magnitude below 65,000 on any counting convention except the one Moore used. And the strongest evidence against the rate is Moore's own 1975 paper, which cuts it in half in the same document that certifies the projection.
Grade: the direction, the mechanism and the existence of a durable exponential were right; the rate was too fast by a factor of about two, and the author corrected it on time. As a forecast that is an extraordinary result. As a data point it should be recorded as one hit and one self-administered correction, not as an unqualified hit, because the canon's whole reason for keeping a base rate is that the difference between those two is where forecasters hide.
The 1975 successor claim, graded separately. "Several million components can be expected within ten years," due 1985. Met, on the usual convention: the 1-megabit DRAM entered production around 1985–86, and a 1Mb DRAM is roughly two million components on the one-transistor-one-capacitor cell that Robert Dennard patented and Mostek commercialised. A second dated claim by the same forecaster, ten years later, at the reduced rate, and it landed. That is a much rarer thing than a single lucky call and it is the strongest evidence in this file that Moore was actually good at this, rather than early.
What happened by 2026. The exponential in transistors per chip continued for five decades past its due date, at roughly the revised rate. Bloom, Jones, Van Reenen and Webb (AER, April 2020) state it flatly: the two-year doubling "corresponds to a constant exponential growth rate of 35 percent per year, a rate that has been remarkably steady for nearly half a century." Nvidia's Blackwell B200 carries 208 billion transistors across two reticle-limited dies; Cerebras's WSE-3 carries about four trillion on one wafer. Against Moore's own 1965 density figure — 500 components per linear inch, "a quarter million per square inch" — my arithmetic puts him at about 388 components per mm², against industry comparisons of roughly 313 million transistors per mm² for TSMC's N2 (a figure from trade comparisons rather than a foundry disclosure, and treated as approximate). That is a factor of about 800,000 in sixty-one years, on a claim whose author gave it ten.
5.2 The application list, graded, because it is his only other rubric
Moore's second paragraph names four things integrated circuits will bring. It is a throwaway list in a magazine, and it is a better forecast than most people's considered ones. Graded against the ten-year window he gave the main claim:
"The electronic wristwatch needs only a display to be feasible today" — right, and right about the blocker. The Hamilton Pulsar P-1 shipped on 4 April 1972, seven years later, and what made it possible was precisely a display: a red LED readout, at $2,100. He named the missing component and the missing component was what arrived.
"Home computers—or at least terminals connected to a central computer" — right, at the edge of the window. The MITS Altair 8800 went on sale in January 1975; apple-iie-1983, ibm-pc-1981 and macintosh-1984 record the mass version arriving six to nineteen years later. And the hedge is the interesting part: "or at least terminals connected to a central computer" is a 1965 statement of the architecture the industry spent 1975–2010 leaving and 2010–2026 returning to. Both halves of his disjunction came true, in that order, and the cartoon on page 84 is a home computer being sold in a department store.
"Personal portable communications equipment" — right, eight years. mobile-phone-1973 dates Martin Cooper's demonstration to 3 April 1973 and the commercial DynaTAC to 1983.
"Automatic controls for automobiles" — right, twelve years, just outside the window. The 1977 Oldsmobile Toronado's MISAR ignition system is generally recorded as the first production car with a microprocessor.
Four for four in direction, three of four inside the ten-year window. This is worth noticing for a specific reason the canon has been building toward: minsky-1970's finding is that a forecast with a concrete task list can be graded and one without cannot, and simon-1965's is that the unrubricked version is the one that gets famous. Here both exist in the same document — a headline number that got famous and a task list that nobody quotes — and the task list is also good. That is a different pattern from Simon and Minsky, and it is the pattern of a forecaster who was actually calibrated rather than merely confident.
5.3 The heat paragraph: Dennard scaling, nine years early, and its failure is the biggest thing in the paper
Section VII, in full-enough part:
> "Will it be possible to remove the heat generated by tens of thousands of > components in a single silicon chip? … Since integrated electronic structures > are two dimensional, they have a surface available for cooling close to each > center of heat generation. In addition, power is needed primarily to drive the > various lines and capacitances associated with the system. As long as a function > is confined to a small area on a wafer, the amount of capacitance which must be > driven is distinctly limited. In fact, shrinking dimensions on an integrated > structure makes it possible to operate the structure at higher speed for the > same power per unit area."
My reading, stated as mine: that last sentence is constant power density under scaling with rising speed, which is Dennard scaling — formalised by Robert Dennard and five colleagues at IBM in "Design of Ion-Implanted MOSFET's with Very Small Physical Dimensions," IEEE Journal of Solid-State Circuits SC-9(5), October 1974 — asserted nine years earlier, in a trade magazine, without the voltage-scaling argument that makes it work. Moore gets there from the geometry of capacitance rather than from device physics, and he is right.
Graded: right for about forty years, then decisively wrong, and the failure is the most consequential sentence in the article. Dennard scaling broke down around 2005–2007: gate oxides had thinned to roughly five atoms by Intel's 65nm generation, leakage current stopped scaling, and power density began rising with density instead of holding constant. Clock frequencies have sat near 4 GHz ever since; the industry's answer was to stop making cores faster and start making more of them.
And the consequence is the shape of 2026. When power per unit of computation stops falling on schedule, the binding constraint on compute migrates from the fab to the grid — which is why this project's ledger is full of gigawatt campuses, twenty-year power leases, and a chip vendor introducing GPU holders to Nordic operators with capacity to plug them in. Moore asked in 1965 whether the heat would be a problem, answered no, and was right for two-thirds of the interval and wrong in the way that now organises the entire industry. A reading that needs one sentence for why AI's constraint is electricity rather than silicon can cite this paragraph and its expiry.
5.4 The cost clause, which is the part that failed first — and what I could not establish
The claim is about minimum cost per component. So the honest question at sixty years is not whether transistors got smaller but whether they got cheaper.
What is well established: wafer costs rise steeply with each leading-edge node, and the rise has accelerated. What is widely asserted and I could not verify from a primary source: that cost per transistor stopped falling around the 28nm node, roughly 2014, and has been flat or rising since. The figures in circulation — wafer prices of about $3,000 at 28nm against $20,000+ at 3nm, and TSMC's cost for an equivalent chip staying near-flat across 10, 7 and 5nm — come from commercial analyst sites and industry forums, not from foundry disclosures, and this entry records them as reported and unverified. Intel and TSMC have both disputed the claim publicly, and both have an interest.
The one hard fact in the project's own record points the same way by a different mechanism, and the difference should not be blurred: Samsung's reported 10–15% foundry price rises of 19 August 2026 are demand-driven scarcity pricing, not scaling cost, and they land on old nodes as well as new. They do not prove anything about the cost of a transistor at 2nm. What they establish is that in August 2026 the price of manufactured logic is moving up, for whatever reason, which is the direction Moore's curve says it does not move.
Grade, stated as judgement: the density half of the claim outlived its horizon by five decades; the cost half — the half that made it an economic claim rather than an engineering one — is the half in trouble, and it is the half nobody quotes. nordhaus-price-of-light-1994 is the canon's warning about exactly this error in the other direction: a price index that measures the wrong thing can be wrong by orders of magnitude while looking rigorous. Anyone pricing AI in dollars per token, or progress in transistors per chip, is choosing a numerator, and the choice is where the argument actually happens.
5.5 What it cost to keep the line straight
This is the finding that transfers most directly to AI forecasting, and it comes from economists rather than from technologists.
Bloom, Jones, Van Reenen and Webb, "Are Ideas Getting Harder to Find?", American Economic Review 110(4), April 2020, pp. 1104–1144, use Moore's law as their lead case:
> "The number of researchers required to double chip density today is more than > 18 times larger than the number required in the early 1970s. At least as far as > semiconductors are concerned, ideas are getting harder to find. Research > productivity in this case is declining sharply, at a rate of 7 percent per > year."
The output exponential was held constant by an input exponential. A straight line on the chart is what you see when effort rises fast enough to offset research productivity falling at 7% a year. That is not a natural law behaving itself; it is an industry running up a down escalator for fifty years, in public, against a published target.
superintelligence-2014 already carries the AI-facing version of this, and the edge should be drawn: David Thorstad (30 May 2024) attacks Bostrom's recalcitrance argument on precisely this ground — that inferring low recalcitrance from Moore's law assumes roughly constant optimisation power in chip design, when "recalcitrance rose by a factor of about 18 across the history of Moore's law." That is the same 18, from the same finding, and this file is where it now lives.
The application to a 2026 reading is direct. When a lab's capability curve is offered as evidence that capability comes cheaply, the Bloom question is: what happened to the input over the same interval? If frontier training compute grew 4–5× a year while spending tripled annually, the curve is not telling you that progress is easy. It is telling you what progress cost.
5.6 Which contributor ran out, and Moore got it backwards
Moore's 1975 forecast was not only about the rate. It named the mechanism: device and circuit cleverness was near its limit — "another factor of four" — while die size and dimension reduction would continue. Fifty-one years on, stated as my judgement and with a caveat that follows:
- Dimension reduction did continue, but decelerated and became extraordinarily expensive; the industry's own roadmap gave up on it as an organising principle when ITRS ended in 2016 and IRDS took over.
- Die size hit a hard physical wall — the lithographic reticle limit — and is now extended by packaging: Blackwell's 208 billion transistors are two dies stitched together, and Cerebras's answer is to abandon dicing altogether.
- Cleverness did not run out. It became the main event. Specialised architectures, low-precision arithmetic, memory hierarchies, compute-in-memory — the Fractile item in §4.3 is a $6.5bn valuation for a cleverness play with no silicon yet.
The caveat is load-bearing and I will not bury it. Moore's "cleverness" term was strictly a component-density term — packing more components into the same area, which is why he could bound it by the CCD's near-maximal packing. Modern architectural gains are mostly not density gains; they deliver more useful work per transistor, which is a quantity Moore's law does not measure at all. So the comparison is loose, and the precise statement is the more interesting one: after about 2005, almost all of the growth in delivered computation came from things Moore's law does not measure — parallelism, specialisation, precision, packaging, and buying more chips. That is why "Moore's law" arguments about AI so often measure the wrong quantity, and it is the single most useful thing this entry can hand a reading.
5.7 The self-grade and the independent grades, and they differ
jobs/canon.md requires this section, and this entry has the most unusual answer in the kind: the forecaster is the strictest grader of the forecast.
Moore's own grades, in order.
- December 1975, at the due date: certifies the projection as realised and halves the rate going forward.
- 2003, ISSCC, in the title of his own talk: "No exponential is forever: but 'forever' can be delayed!"
- On the 18-month version, repeatedly and irritably: "Now the one that gets quoted is doubling every 18 months… I think it was Dave House, who used to work here at Intel, did that… but that's what got on Intel's Website… I never said 18 months."
- 2015, at fifty years, to IEEE Spectrum: "I just did a wild extrapolation saying it's going to continue to double every year for the next 10 years. And it proved to be amazingly correct." Elsewhere in the same period: "It was just a lucky guess, I guess on my part." And: "I guess I see Moore's law dying here in the next decade or so, but that's not surprising." He also observed that the law had come to "almost drive the semiconductor industry rather than just record its progress" — §5.8.
This is a fifth manoeuvre, and it is the only good one. simon-1965 §5.5 sets out the four the canon had already recorded, each of which destroys the record in its own way: kurzweil-2005 — the claim is kept and the scoring is loosened; minsky-1970 — the claim is disowned; amodei-2024-loving-grace — the claim is kept and the date advances; simon-1965 — the claim is kept, the date is dropped, and dating is declined as an activity. Moore's is the fifth:
moore-1965— the claim is kept, the rate is cut, the correction is published by the forecaster at the due date with the arithmetic shown, and the revision is itself dated and falsifiable.
It is the only one of the five that leaves the base rate intact. Four forecasters made their own records unscoreable; one made his record more scoreable by revising it in public, and then went on grading himself downward for forty years. jobs/canon.md says a base rate assembled from self-assessments would be worthless. Five worked cases now say why — and the fifth shows what the exception looks like, which is worth more than another instance of the rule.
The independent grades, and they disagree with each other, not just with him.
- **Ilkka Tuomi, "The Lives and Death of Moore's Law," First Monday 7(11), November 2002** — the sharpest published dissent. Tuomi distinguishes several incompatible things all called Moore's law, finds "common versions of Moore's Law have not been valid during the last decades," reports Intel microprocessor transistor counts doubling every ~22 months in the first decade but stretching to ~33 and then ~54 months by the Pentium era, and concludes that the law is "a fascinating case of how myths are manufactured in the modern society" and that "strictly speaking there is no such Law."
- Bloom, Jones, Van Reenen and Webb, 2020 — the opposite verdict on the headline fact: 35% a year, "remarkably steady for nearly half a century."
- Jensen Huang, GTC, September 2022: "Moore's Law's dead… It's completely over," said while defending the price of a graphics card. Pat Gelsinger, days later: "Moore's Law is alive and well," said while running Intel, later amended to a doubling "closer to every three years."
They differ because they are counting different things, and every one of them has a stake. Tuomi counts microprocessor transistor counts and quality-adjusted prices; Bloom et al. count chip density; Huang counts what he can charge per unit of performance; Gelsinger counts what his fabs can deliver. The right conclusion is not that one of them is lying. It is that "did Moore's law hold" is not a single question, and a reading that repeats any one of these verdicts without saying which quantity it is about is transmitting an argument as though it were a fact.
5.8 The contamination, stated plainly
Moore in 2015 said the law had come to drive the industry rather than record it. The mechanism is documented and he is in it.
The Semiconductor Research Corporation's own timeline records that the 1992 National Technology Roadmap for Semiconductors — the industry's first common fifteen-year plan, built by over 170 IC technologists in breakout groups — began with a working session that Gordon Moore, then chairman of the board of Intel, convened. Further editions followed in 1994 and 1997; in 1998 the American association was joined by its counterparts in Europe, Japan, Korea and Taiwan, and the International Technology Roadmap for Semiconductors ran from 1999 until it was discontinued after 2016, when the IEEE's IRDS replaced it and the industry adopted "More than Moore" as its framing.
So for at least twenty-four of the fifty-one years, the curve was a plan. Competitors coordinated on node timing and specifications because a shared schedule made the equipment and materials supply chain investable. Firms that fell behind the roadmap lost customers. The forecast became a contract.
What follows for a base rate. proposals.md filed this entry as "the base rate's one clean success," and the honest amendment is: it is the kind's one clean success and it is not clean. A prediction that its own author later convened an industry to institutionalise is a measurement of coordination, not of foresight. Any use of this entry as evidence that long-horizon technology forecasting can work must carry the condition that made it work — a single industry, a measurable quantity, a published common target, and exponentially rising investment to hit it. Remove any one of those and there is no reason to expect the record to repeat. AI capability forecasting has none of the four.
6. Commonly misused as
Not required for prediction. Included because this claim is, by a wide margin, the most misquoted item in the canon, and because two of the misuses are load bearing for AI argument in 2026.
"Computing power doubles every 18 months."
He never said 18 months, and he never said power. The 1965 claim is one year; the 1975 revision is two years; both are about components per chip at minimum cost. The 18-month figure comes from David House, an Intel executive, who combined the two-year density doubling with transistors also getting faster and got a doubling of chip performance every 18 months — a different quantity by a different mechanism. Moore's own comment is quoted in §5.7. Intel's own website carried the misquote, which is the detail worth keeping: a company misquoted its own founder's own paper for years, in the direction that flattered the product.
"Moore's law is a law."
It is a trade-magazine extrapolation from five data points that an industry subsequently agreed to hit. Tuomi's "strictly speaking there is no such Law" is the strong form. scaling-laws-2020 makes the identical complaint about its own subject — "the word law is doing enormous unearned work — these are extrapolated empirical regularities of the same epistemic type as Moore's law" — and that entry is right to name this one. The word is not decoration. It is what allows an observation about one industry's cost structure to be deployed as though it were a constraint on the future.
"Technology advances exponentially — Moore's law proves it — therefore [AI claim]."
The signature move of kurzweil-2005, whose Chapter Two generalises this curve into a Law of Accelerating Returns spanning five paradigms and biological evolution. That entry grades the result: measured price-performance doubled every ~2.3–2.5 years rather than Kurzweil's one year, the exponent did not itself grow, and the compounding error over twenty-one years is roughly a factor of 3,700. The generalisation fails on the specifics of the case it generalises from. Moore's law was one industry, one physical process, one coordinated roadmap, and an 18-fold rise in research input. It is a bad template precisely because it is such a good instance.
"AI compute is on a Moore's law."
No: it is growing at 4–5× a year against Moore's 1.35×, and §4.2 sets out where the difference comes from. Calling the AI compute curve a Moore's law imports a reassurance the mechanism does not support — Moore's curve was paid for out of a falling unit cost, and the AI compute curve is paid for out of capital expenditure and power contracts. They fail differently and they fail at different speeds.
"Moore's law is dead" / "Moore's law is alive."
Both are usually claims about different quantities made by people with products, and §5.7 gives four graders disagreeing. Before either is repeated in a reading, the sentence needs a subject: transistors per chip (still rising), transistor density per mm² (rising, more slowly, at great expense), cost per transistor (contested, probably flat, §5.4), clock frequency (flat since ~2006, §5.3), or delivered performance per dollar (rising, mostly from things Moore's law does not measure, §5.6). Five subjects, five different answers, one phrase.
"The prediction was accurate, so long-horizon technology forecasting works."
The specific inversion this entry exists to block. §5.8. The correct statement is: one long-horizon technology forecast came true, in an industry that reorganised itself around making it come true, at a research cost that rose eighteen-fold.
7. Sources
Primary, read directly as rendered page images.
- **Gordon E. Moore, "Cramming More Components onto Integrated Circuits," Electronics 38(8), 19 April 1965, pp. 114–117**, read in the reprint at Proceedings of the IEEE 86(1), January 1998, pp. 82–85 (Publisher Item Identifier S 0018-9219(98)00753-1), from the copy at cs.utexas.edu/~fussell/courses/cs352h/papers/moore.pdf. All four pages read. Source for every quotation attributed to the 1965 paper: the standfirst, the applications list, the cost-curve paragraph and the 50-component minimum, the "complexity for minimum component costs" sentence and the 65,000 figure, the single-wafer sentence, the two-mil-square and quarter-million-per-square-inch figures, the 100% yield assertion, the whole of the Heat Problem section, the "Day of Reckoning" design-automation remark, the contributor's biographical note, and the HANDY HOME COMPUTERS cartoon at Fig. 2. The original magazine was not seen; the 1998 reprint is a typeset reset and I cannot rule out silent editorial changes between the two, though the reprint states it is a reprint and gives the original pagination.
- Gordon E. Moore, "Progress in Digital Integrated Electronics," IEDM Technical Digest, IEEE, 1975, pp. 11–13, read in Intel's own reprint (document 306956-001US) at eng.auburn.edu. All three pages read. Source for the opening sentence, the die-area factor of ~20 and the 16,384-bit CCD memory chip as the 1975 point, the ~32× from dimension reduction, the 640-fold product and the ~100× residual, the "noteworthy… more important than either increased chip area or finer lines" sentence, the factor-of-four limit on cleverness, the "doubling every two years, rather than every year" revision, and the "several million components… within ten years" claim.
Read via fetch, and used for what is attributed to them.
- **Bloom, Jones, Van Reenen and Webb, "Are Ideas Getting Harder to Find?", American Economic Review 110(4), April 2020, pp. 1104–1144 — pages 1104–1105 read as page images from web.stanford.edu/~chadj/IdeaPF.pdf. Source for the 18× researchers figure, the 7%-per-year research-productivity decline in semiconductors, the 35%-per-year framing, and the aggregate factor-of-41 US decline. The body of the paper was not read**, so nothing here is attributed to its semiconductor data appendix.
- **Ilkka Tuomi, "The Lives and Death of Moore's Law," First Monday 7(11), November 2002 — read at cybra.lodz.pl via a fetch-and-summarise tool rather than by eye; the First Monday canonical copy returned only navigation. The quoted phrases are reported by that tool as verbatim and I could not re-verify them character by character**, which matters more than usual because they are the sharpest dissent in this file.
- Computer History Museum, "1965: 'Moore's Law' Predicts the Future of Integrated Circuits" — source for the five data points 1959–1964, the Carver Mead attribution, and the "doubling every two years, rather than every year" characterisation of the 1975 revision. And CHM's Storage Engine, "1977: Bubbles, CCDs & other forgotten memories," for CCD and bubble memories being "ultimately unsuccessful in the marketplace."
- Semiconductor Research Corporation's 1992 timeline entry (src.org) — source for the sentence that Moore convened the NTRS working session, and for the 170 technologists and the fifteen-year horizon. This is the single most important factual find in the file and it comes from an industry body's own history page; it would be worth corroborating from the 1992 roadmap document itself, which I did not reach.
- IEEE Spectrum, Rachel Courtland's 30 March 2015 interview, "Gordon Moore: The Man Whose Name Means Progress" — source for "wild extrapolation," for Moore's Law having come to "almost drive the semiconductor industry rather than just record its progress," and for "I guess I see Moore's law dying here in the next decade or so."
- The Chip Letter, "Moore on Moore" — source for Moore's "I never said 18 months" and the Dave House attribution, for "I was just trying to get across the idea this was a technology that had a future," for the Micrologic/50–60 component recollection, and for "lucky guess." These are Moore's words reached through a secondary compiler, not from the interviews themselves; the Intel document "Excerpts from A Conversation with Gordon Moore: Moore's Law," which is the primary for several of them, was unreachable — the Stanford host refused the connection. That is the most valuable unread source here.
- Epoch AI, Jaime Sevilla and Edu Roldán, "Training compute of frontier AI models grows by 4-5x per year," 28 May 2024 — 4.1×/year for notable models (90% CI 3.7–4.6), 5.3×/year for frontier models (90% CI 4.9–5.7), 333 models, 2010 to May 2024. The FLOP/s-per-dollar doubling times are carried over from
kurzweil-2005, which sources them to Epoch directly. - The Next Platform, "Cerebras Overclocks WSE-3 Waferscale Engine To Boost Inference Oomph In 'Nexus' CS-4," 19 August 2026 — the 1.4→2.8 GHz clock and the "twice as much power" and "a little more than twice as much cooling" quotations. WSE-3's 4 trillion transistors, 46,225 mm² and TSMC N5 process are from Cerebras's own 2024 announcement, i.e. vendor figures.
Established by search against primaries, without reading the full document. For each of these I can vouch for the fact and the citation and not for having read the source end to end.
- **Robert H. Dennard, Fritz H. Gaensslen, Hwa-Nien Yu, V. Leo Rideout, Ernest Bassous and Andre R. LeBlanc, "Design of Ion-Implanted MOSFET's with Very Small Physical Dimensions," IEEE Journal of Solid-State Circuits SC-9(5), October 1974, pp. 256–268.** Cited for the formalisation only; the breakdown dates (~2005–2007, 65nm gate oxides near five atoms, frequency flat near 4 GHz since ~2006) are from secondary technical accounts, and the identification of Moore's 1965 paragraph as Dennard scaling is my reading, flagged as mine in §5.3.
- The roadmap sequence — NTRS 1992/1994/1997, ITRS from 1998–99, discontinued after 2016, IRDS from 2016 — from the ITRS's own executive summaries and encyclopaedic accounts.
- The Pulsar P-1, released 4 April 1972 by Hamilton Watch Company (Guinness World Records; Smithsonian NMAH object record). The 1977 Oldsmobile Toronado MISAR ignition system as the first production car with a microprocessor (SAE paper 780666 and Oldsmobile reference pages). The MITS Altair 8800, January 1975. Dates only; nothing is quoted from any of them.
- The 1985 megabit-DRAM checkpoint — 4K DRAM in 1973 and the 16K MK4116 in 1976 are from CHM and from a reverse-engineering account of the part; the 1-megabit generation's 1985–86 arrival is stated here from general knowledge and should be treated as approximate, which is why §5.1 grades the "several million components" claim as met on a convention rather than on a citation.
- Nvidia Blackwell B200 at 208 billion transistors across two reticle-limited dies — vendor figure, widely reported. Rubin's reported 336 billion was found only on aggregator sites and is not used.
- TSMC N2 at roughly 313 million transistors per mm² — from trade comparisons of N2, Intel 18A and Samsung SF2, not a foundry disclosure, and used only for the order-of-magnitude comparison in §5.1.
- The Huang and Gelsinger exchange, September 2022. The exact Huang quotation is as carried by MarketWatch and CNBC from a GTC press session; CNBC's page returned HTTP 403 to a direct fetch and the quote reaches this file through search summaries of that reporting.
- The Intel $10,000 bounty, April 2005, and the copy found under a British engineer's floorboards, from NBC News's contemporaneous reporting.
What I could not establish, and left out.
- A primary source for the cost-per-transistor stall at 28nm. §5.4 says so in terms. The wafer-price ladder ($3,000 at 28nm to $20,000+ at 3nm) and the flat-cost-per-equivalent-chip claim across 10/7/5nm come from commercial analyst sites and a semiconductor industry forum. This is the largest evidential gap in the file, and it sits under the clause the 1965 claim actually depends on.
- Whether the 1965 magazine text and the 1998 reprint are identical. Not checkable from here.
- Whether Moore ever addressed, in print, the tension between his 2015 remark that the law drove the industry and his role in convening the 1992 roadmap. I looked and did not find it. If it exists it is the most interesting missing sentence in this entry.
- Carver Mead's coining of the term. Universally attributed, dated only as "shortly after 1975" or "the mid-1970s," and I found no first use by Mead himself. Recorded as attribution, not as a dated fact.
8. On the boundary
This file cites kurzweil-2005, bitter-lesson-2019, scaling-laws-2020, superintelligence-2014, human-genome-project-2003, mobile-phone-1973, ibm-pc-1981, apple-iie-1983, macintosh-1984, spacex-booster-reuse, tesla-volume-production, google-index-1998, simon-1965, minsky-1970, amodei-2024-loving-grace, human-computers and nordhaus-price-of-light-1994 as entries already in canon/. It invents no ids, and it names the ancestor it wanted and could not draw — an entry for the integrated circuit itself, which does not exist here.
It refers to this project's own readings of 17, 19 and 20 August 2026 — the $3tn of off-balance-sheet commitments, the 10GW lease, Dell'Oro's revised capex outlook, Samsung's foundry price rise, the Cerebras CS-4 and Fractile's valuation — only to name live citation occasions. Nothing in them is used as evidence about the world, and no reading's finding is restated as a fact of this file's own.
It deposits nothing in the evidence ledger, grades no model and no vendor, and places no needle and no landmark. The judgements it makes are stated as judgement: that the 1965 claim was right in direction and about twice too fast in rate; that the author's on-time downward revision is the honest end of a five-case series the canon has been assembling since minsky-1970; that the cost clause is the half in trouble and the evidence for that is weaker than the claim usually made; that the heat paragraph was right for forty years and its failure now organises the industry; and that the entry's headline virtue as a base-rate data point is substantially undone by the fact that the forecaster helped convene the committee that turned his forecast into a plan. Where an independent grader and the forecaster differ, §5.7 says so; where two independent graders differ from each other, it says that too, and says why.